Please use this identifier to cite or link to this item:
|Title:||Online junction temperature estimation of siC power MOSFETS|
|Abstract:||Silicon Carbide (SiC) based power devices receive more and more popularity in the field of power electronics as they operate at higher voltages, higher switching frequencies and higher temperatures compared to traditional Silicon (Si) based power modules. As for SiC-based power devices, the temperature of SiC chip must be monitored in order to operate the device within its limit. However, it is not straight forward to directly measure the junction temperature (Tj) of a power device non-intrusively due to the package obstruction. Therefore, indirect Tj measurement methods like Temperature Sensitive Electrical Parameters (TSEPs) are preferred by researchers and been intensively investigated for Si devices as the dominant power devices in the past. However, those TSEPs which are effective for Si devices are mostly not applicable to SiC devices. This is due to different physical and electrical behaviour between SiC-based device and Si-based device. Thus, it is necessary to develop new method to implement indirect Tj measurement for SiC devices. This thesis presents a new on-line technique to estimate the Tj of discrete SiC MOSFET devices. In this work, small amplitude, high frequency chirp signals are injected into the gate of a discrete SiC device during its off-state operation. Then, the gate-source voltage (VGS) is measured and its frequency response (FR) characteristic is determined by using Discrete Fast Fourier Transform (DFFT) analysis. The captured VGS signal is a direct function of the gate-source loop impedance. The derived function becomes a linear function in respect Tj as it represents only the resistive elements of the gate-source loop. As the gate channel resistance of the SiC MOSFET (Rint) is the largest resistance in that loop and it is temperature dependent. As a result, the temperature of the SiC MOSFET chip can be estimated. The new method in the thesis will be explained in details and the theory will be backed up by analytical simulations. A 3D numerical model for the discrete SiC MOSFET is also established and simulated. Furthermore, a network analyser is used for initial validation of the new method and finally a boost circuit was built with signal injection circuit integrated within the gate driver circuit to demonstrate the feasibility of using this innovative method to extract junction temperature of a discrete SiC MOSFET.|
|Appears in Collections:||School of Engineering|
Files in This Item:
|Lu X 2020.pdf||8 MB||Adobe PDF||View/Open|
|dspacelicence.pdf||43.82 kB||Adobe PDF||View/Open|
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.