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DC Field | Value | Language |
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dc.contributor.author | Ganti, Srinivas | - |
dc.date.accessioned | 2018-11-21T16:20:33Z | - |
dc.date.available | 2018-11-21T16:20:33Z | - |
dc.date.issued | 2018 | - |
dc.identifier.uri | http://hdl.handle.net/10443/4093 | - |
dc.description | PhD Thesis | en_US |
dc.description.abstract | Metal semiconductor (MS) contacts are essential in nearly every electronic device. High electrical contact resistance degrades device performance, especially at smaller device geometries. The contact resistance normally scales inversely with the cross-sectional area of the MS contact, and this results in poor electrical conduction in small geometries. Additionally, experiments confirm that surface effects dominate over bulk properties, especially at nanoscale geometries. These conditions impose several restrictions in implementing various device technologies. The electronic properties of metal-semiconductor contacts in some important semiconductors such as Si, Ge, GaAs, among others are found to be largely insensitive to the metal workfunction and semiconductor doping level, due to a phenomenon called Fermi level pinning (FLP). FLP can severely degrade device performance, and creates several fabrication challenges. Many semiconductors lose their applicability in mainstream electronics due to restrictions imposed by this effect. FLP effects are practically observed in many semiconductors doped below 1019 cm−3 and are most pronounced in lightly doped and (~intrinsic) pure crystals. This thesis explores material engineering methods to improve contact to semiconductors, without resorting to heavy doping. Large area metal contacts (length/ diameter (d)~ 50-300 μm) are fabricated on Si and Ge. Three key approaches are investigated: (1) Modifying interface dipoles and blocking Metal Induced Gap States (MIGS) using ~ nm thick charged oxide interlayers, implementing planar metal interlayer semiconductor (MIS) contacts (Chapter 4). (2) Exploiting geometric field enhancement in nanostructured hybrid contacts (Chapter 5) and (3) Exploiting voltage controlled non-equilibrium electron heating in island metal films. The contacts produced by these methods (2) and (3) are the first experimental demonstrations to show that limitations imposed by FLP can be overcome by modifying the contact material geometry alone, without using heavy doping. Applying mV range bias to these metallizations causes hot carrier emission from these contact’s nanostructured surfaces. Hot carriers are non-equilibrium, energetic carriers that easily overcome the FLP effect in the semiconductor. High conductivity is observed due to the hot carrier effect over a broad range of temperatures –from 4.2 K, tested up to 500 K- despite using low doping in the semiconductor (ND ~ 6.4 × 1014 cm−3). Novel transport processes are revealed by hot carrier tunnelling and emission mechanisms, which improve conductivity in semiconductors, and will potentially be applicable to other low dimensional materials as well. The results in Chapter 5 show an interesting demonstration of hot carrier edge scaling current injection used to achieve Ohmic contact to low doped n-Ge. This contact scheme presents a ii promising alternative to improving conductivity extrinsically, without using heavy doping, and in a scalable manner. Chapter 6 also contains a proof of concept demonstration. It is shown that closely spaced networks of metal nano-islands of critical dimensions are susceptible to non-equilibrium electron heating, when they receive power in the form of voltage controlled tunnel current. This leads to elevated electron temperatures (~103 K) relative to a cold lattice (at ambient temperature). Hot carriers easily overcome small (few eV) electrostatic barriers e.g. Schottky barrier. Consequently, Ohmic conduction is observed at room temperature, and near ballistic hot carrier conduction is observed at 4.2 K through the entire low doped wafer (thickness 0.5 mm, ND ~ 6.4 × 1014 cm−3). The wide scope of these findings may find promising applications in nanoelectronic engineering and applied science. There is considerable incentive to continue the research, and obtain a wider range of materials capable of similar effects, described further in the thesis outlook (Chapter 7). Advancing this research further will translate to applications in high speed switching, sensing, optoelectronics and energy harvesting. It is anticipated that these technologies will be applicable to many semiconductors and can be adapted into heterostructures, using advanced fabrication methods. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Newcastle University | en_US |
dc.title | Low resistance metal semiconductor contacts : low power nano-electronics and sensing | en_US |
dc.type | Thesis | en_US |
Appears in Collections: | School of Electrical and Electronic Engineering |
Files in This Item:
File | Description | Size | Format | |
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Ganti, S. 2018.pdf | Thesis | 10.26 MB | Adobe PDF | View/Open |
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