Local characterisation of strain in silicon nanostructures

Abstract

Strain engineering is used in the microelectronics industry for fabricating micro- and nano-electromechanical systems (MEMS and NEMS) and state-of-the-art metal-oxide-semiconductor field-effect transistors (MOSFETs). In these devices suspended silicon beams, films and nanowires are widely used. However, the mechanical, thermal and electrical properties of silicon change significantly at the nanoscale. Therefore, an accurate knowledge of the size effect on these properties, the role of the surface and an accurate characterisation of the stress and strain distribution in these devices is needed for a complete understanding of the device operation. Likewise, state-of-the-art MOSFETs incorporate strain into the channel to improve performance due to a carrier mobility enhancement compared with unstrained silicon channel transistors. However, the mobility enhancement especially at high vertical electric fields (where commercial MOSFETs operate), is still not well understood. The SiO2/Si interface roughness exhibits, at the nanoscale, scaling behaviour with the scale of observation. However, to date, there is no experimental study of the SiO2/Si interface roughness scaling behaviour with strain. This study is needed to better understand the surface roughness scattering-limited mobility of electrons and holes in strained devices. Raman spectroscopy is a widely used technique to characterise strain. However, the conversion of Raman peak shifts to strain values requires a strain-shift coefficient. Traditionally, the reported strain-shift coefficients have been determined from experiments performed in bulk material. The applied stress has also been limited within the range 0 – 2 GPa. This range is reasonable for bulk silicon characterisation but is too narrow for silicon nanostructures and devices where higher stress values are often favourable for improving performance. Consequently, there is an outstanding need to find appropriate strain-shift coefficients for silicon nanowires and thin films under large values of stress. In this thesis strain in silicon nanostructures is experimentally and theoretically investigated for strain values ranging from 0 to 3.6%. Strain has been characterised using scanning electron microscopy (SEM), Raman spectroscopy, and theoretically with analytical calculations and finite element simulations. The combination of these techniques and the large number of samples (up to 85) has allowed the accurate determination of the ii strain-shift coefficient for the technologically important (100) silicon surface and for stress values up to 4.5 GPa. The work also enables a better understanding of the changes in silicon properties with strain when device dimensions are reduced to the nanoscale. The size dependency of the Young‟s modulus, fracture strain, thermal conductivity and the role of the surface in the size dependent physics are also investigated. It is found that some properties such as the fracture strain change with the dimensions of the sample whereas others such as the Young‟s modulus and thermal conductivity do not change. Finally, the impact of uniaxial and biaxial strain on the surface roughness of silicon nanostructures and thin films has been analysed by atomic force microscopy (AFM). It is found that the silicon surface roughness changes in different manner with uniaxial and biaxial strain. The results show that the silicon surface roughness is self-affine with strain and that this behaviour has to be considered within the models used to describe the carrier mobility in MOSFETs at high vertical electric fields.