Please use this identifier to cite or link to this item: http://theses.ncl.ac.uk/jspui/handle/10443/3754
Title: Performance of direct power controlled grid-connected voltage source converters
Authors: Mulolani, Francis
Issue Date: 2017
Publisher: Newcastle University
Abstract: In this thesis the performance of direct power controlled grid-connected voltage source converters (VSCs) is investigated. Of particular interest is the stability of the controller with the third-order LCL filter employed as the grid filter, effect of grid impedance variations and grid voltage distortion, and current limitation during voltage dips. The control scheme implemented is virtual-flux direct power control with space vector modulation (VF-DPC-SVM). By mathematical modelling and stability analysis, it is found that the closed-loop power control system is stable for all values of proportional gain when the current sensors are on the inverter side of the LCL filter. The inverter current together with the estimated grid virtual-flux is used to estimate the active power and the reactive power. The difference between the estimated reactive power and the reactive power on the grid side is compensated for, using a new reactive power error compensation scheme based on the estimated capacitor current. The control system is found to be robust to changes in grid inductance, and remains stable for a range of grid inductance values, and controller proportional gain. It is demonstrated in simulation and experimentally that the total harmonic distortion (THD) of the current injected by the VSC is less than the limit of 5 %, set by standards, for all different values of grid inductance and proportional gain. This is true even in the presence of significant grid voltage distortion. To control the VSC during voltage dips without damaging the semiconductor devices, a new current limiting algorithm is proposed and implemented. The positive-sequence component of the virtual-flux is used for synchronization and power estimation to achieve balanced, undistorted currents during unsymmetrical voltage dips. Experimental results show that the current achieved during unsymmetrical voltage dips is balanced and has a THD of less than 3 %.
Description: PhD Thesis
URI: http://hdl.handle.net/10443/3754
Appears in Collections:School of Electrical and Electronic Engineering

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